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Wafer Level Chip Scale Package (WLCSP)

JCAP offers high performance fan-in wafer level packaging (FIWLP) solutions that provide significant package footprint reductions, lower cost, improved electrical performance, and a relatively simpler construction over conventional wirebond or interposer packaging.

Wafer Level Chip Scale Package (WLCSP) offers one of the most compact package footprints, providing increased functionality, improved thermal performance and finer pitch interconnection to the printed circuit board. Based on its small form factor and low cost, WLCSP has experienced significant growth driven aggressively by mobile consumer products because of the small form factor and high performance requirements. With WLCSP, all of the manufacturing process steps are performed in parallel at the silicon wafer level rather than sequentially on individual chips to achieve a package that is essentially the same size as the die. The resultant package has dielectrics, thin film metals, and solder bumps directly on the surface of the die with no additional packaging. The basic structure of the WLCSP has an active surface with polymer coatings and bumps with bare silicon exposed on the remaining sides and back of the die. The WLCSP is the smallest possible package size since the final package is no larger than the required circuit area.

The WLCSP Advantage

• 200mm & 300mm wafer bumping offers advanced technology in WLP services that enable higher current densities & increased reliability

• Repassivation, Redistribution, Bumping and IPD layer options available

• Full turnkey assembly capability(shipped by TnR)

WLCSP Features

• WLCSP body sizes qualified up to 6x6mm

• Ball count ranges depending on pitch size and up to 300

• Die services available for 8”-12” wafers

• In-house thin film on wafer processing & bumping

• Full service wafer bumping with Polyimide or PBO dielectric options for wafer repassivation, redistribution and IPD layers

• Bumps formed by ball drop solder bump technologies

• Minimum available solder ball size is 120µm

• Copper under bump metallization (UBM) & redistribution layers (RDL) available (Enable for 3P3M)

• Wafer level IPD & thick copper (8-12µm) conductors available

• Compatible with conventional SMT assembly and test techniques

WLCSP Market Applications & Drivers

A small, lightweight, high performance semiconductor solution, WLCSP is a compelling, cost effective solution for space constrained mobile applications and other portable consumer and industrial devices